(1) Field of the Invention
This invention relates to a thin film crystal wafer with pn-junction and its manufacturing process, in particular, a thin film crystal wafer that is suitable for manufacture of InGaP/GaAs heterojunction bipolar transistor (HBT).
(2) Description of the Related Art
The heterojunction bipolar transistor (HBT) has a heterojunction emitter-base junction, in order to increase emitter injection efficiency, the emitter layer of which is made of a substance with a greater band gap than a substance used for the base layer. Such a transistor is suitable for a semiconductor element that is used in the range of high frequencies and is expected to become a semiconductor element for the next generation of portable telephones. The reasons for such an expectation are that the transistor can be driven with a single power supply, is highly efficient and has a low distortion property. The InGaP HBT has especially been attracting attention, because, compared with AlGaAs-HBT which is currently the most developed, it is characterized by 1) being harder to be oxidized, capable of producing a higher purity crystal, 2) has a greater valence band offset from GaAs, capable of generating less holes injection to emitter region, 3) having no deep level DX center which is characteristic of semiconductors of 3-5 group compound semiconductors, 4) having a lower interfacial recombination velocity, and 5) having a greater etching selectivity, hence being more favorable in device processing.
The InGap/GaAs HBT is manufactured, for example, by forming a thin film crystal wafer, the pn-junction, or emitter-base junction of which has a heterojunction structure by inducing crystal growth of, in succession, n+-type GaAs layer, n-type GaAs layer (collector layer), p-type GaAs layer (base layer), n-type InGaP layer (emitter layer) and n-type GaAs layer (cap layer) on a semi-insulating GaAs substrate by the organometallic pyrolysis (MOVPE) method.
In HBT made using InGaP thin film crystal wafer, the structure of which is described above, depletion of carrier electron is known to occur from the heterojunction interface between the n-type InGaP layer (emitter layer) and n-type GaAs layer (cap layer) when the wafer is formed by inducing crystal growth of, in succession, the n-type InGaP layer (emitter layer) and the n-type GaAs layer (cap layer). It has been pointed out that when the depletion of carrier electrons occurs, there arises the problem of increasing emitter resistance and deteriorating element properties including high frequency properties.
In order to solve this problem, an impurity layer such as a Si layer with low diffusion coefficient is produced at the above-mentioned heterojunction interface by using the technique of planar doping, in which the supply of 3-group raw materials is stopped to discontinue the crystallization growth, an impurity is introduced onto the surface, and a very thin film impurity layer is formed. The structure to which an impurity is introduced to solve the problem of deterioration of emitter resistance due to depletion of carrier electron is described, for example, in the JP-A-8-293505.
The planar doping contains a process of desorption of impurity at the time of stopping the supply of 3-group raw materials and adsorption of impurity onto the surface of crystal in an atmosphere of 5-group raw material. Therefore, the amount of impurity is affected not only by the amount of supply of Si but also by a growth temperature, a partial pressure of 5-group raw material and the way of switching gas during a period from the completion of the planar doping to the starting of growth of the next layer. Activation rates of impurity change according to manufacturing conditions, since a large quantity of impurity atoms are introduced to the very thin film and hence induce defects. In addition, the thickness of the doped layer is difficult to control since atoms on the surface tend to segregate. Subsequently, with the introduction of impurity in planar doping, as compared to the formation of an ordinary impurity doped layer, it is more difficult to control the doping amount and the thickness of the diffusion film, thereby aggravating in-plane uniformity and reproducibility. For the purpose of stable manufacture of thin film crystal wafers, planar doping is disadvantageous as compared to the formation of the ordinary doping layer to which impurity is introduced during crystal growth.
At the time of formation of the planar doping layer on the above-described heterojunction interface, the crystal growth is discontinued on the surface of the InGaP layer and impurities such as Si are introduced in a phosphine atmosphere. In the next growth, the 5-group element is replaced with arsine to form an epitaxial layer. It is known that since the decomposition pressure of P in the crystal layer is higher than that of As, the InGaPAs layer, a transition layer, is formed on the interface when the InGaP layer is replaced with the GaAs layer. This is another problem that aggravates the controllability of planar doping.
Furthermore, the present inventors eagerly studied the above-described problems and have found that the phenomenon of depletion of carriers occurring at the heterojunction interface between the InGaP layer and the GaAs layer does not only create the problem of increase in emitter resistance of the heterojunction bipolar transistor but also of increase in base current at a region with a relatively low voltage between the emitter and base, that is, a region with a low collector current density.
The increase in base current manifests as decrease in current gain in a low collector current density. When devices with such characteristics are used as an amplifier for communication, performances such as electric power efficiency and distortion property at low output are aggravated.
The purpose of this invention is to provide a thin film crystal wafer with an improved pn-junction that can solve the above-mentioned problems in the prior art as well as a process for manufacture thereof.
According to this Invention, by forming a charge compensation layer between the n-type InGaP layer which serves as the emitter layer of HBT, and the GaAs layer which is formed above the former, the increase in base current due to the phenomenon of depletion of carriers at the interface is suppressed, thereby preventing the decrease in current gain in low collector current in HBT.
In addition, when the amount of n-type impurity introduced in order to lessen the influence of the depletion phenomenon is excessive, the breakdown voltage in the reverse bias between the emitter and base will be decreased. By regulating quantitatively the amount of n-type impurity, while the breakdown voltage between the emitter and base is maintained, the decrease in current gain in low collector current is prevented. Thus, a thin film crystal wafer with pn-junction can be provided, which has satisfactory reproducibility and productivity.
The first mode of this invention is a thin film crystal wafer with pn-junction, comprising a first layer of a first conductivity type which is a 3-5 group compound semiconductor represented by a general formula: InxGayAlzP, (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6zxe2x89xa61, x+y+z=1), and the second layer of a first conductivity type which is a 3-5 group compound semiconductor represented by a general formula: InxGayAlZAs (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6zxe2x89xa61, x+y+z=1), said second layer being made above said first layer, and at a heterojunction interface formed between said first layer and said second layer, further comprising a charge compensation layer of a first conductivity type with an impurity concentrations higher than that of said first and second layers.
The second mode of this invention is a thin film crystal wafer with pn-junction, described in the above first mode, further comprising a collector layer and a base layer wherein said first layer is a semiconductor layer which serves as an emitter layer with a bandgap energy larger than said base layer.
The third mode of this invention is a thin film crystal wafer with pn-junction described in the above first or second mode, wherein said first layer is an n-type InGaP layer and said second layer is an n-type AlxGayAs layer (0xe2x89xa6Xxe2x89xa61, 0xe2x89xa6Yxe2x89xa61, X+Y=1).
The fourth mode of this invention is a thin film crystal wafer with pn-junction described in the above first, second or third mode, wherein an n-type impurity is Si.
The fifth mode of this invention is a thin film crystal wafer with pn-junction described in the first, second, third or fourth mode, wherein said charge compensation layer has a thickness of not more than 15 nm and doping amount is greater than 1xc3x971018 cmxe2x88x923.
The sixth mode of this invention is a thin film crystal wafer with pn-junction described in the above first, second, third, fourth or fifth mode, wherein said first layer has a thickness of not more than 60 nm.
The seventh mode of this invention is a thin film crystal wafer with pn-junction described in the above first, second, third, fourth, fifth or sixth mode, wherein a carrier concentration and thickness of said charge compensation layer are controlled depending on a bandgap energy of said first layer.
The eighth mode of this invention is a thin film crystal wafer with pn-junction described in the above first, second, third, fourth, fifth, sixth or seventh mode, wherein sheet doping amount Ns (cmxe2x88x922) that is a product of carrier concentration and thickness of said charge compensation layer satisfies:
(180xc3x97xcex94Eg+3.0)xc3x971E11xc3x97C1 greater than Ns greater than (160xc3x97xcex94Egxe2x88x924.6)xc3x971E11xc3x97C2 
wherein
xcex94Eg=(1.92xe2x88x92(Eg+1xc3x97y)), 
C1=((dInGaP/30){circumflex over ( )}(xe2x88x921.0))xc3x97(xe2x88x922.1Exe2x88x9217xc3x97Ndemitter+26.8)/16.2xc3x97(1.2xc3x97dn+GaAs+9.8)/15.7
C2=((dInGaP/30){circumflex over ( )}(xe2x88x921.59))xc3x97(xe2x88x921.7Exe2x88x9218xc3x97Ndemitter+14.9)/6.5xc3x97(0.61xc3x97dn+GaAs+3.5)/6.6xc3x97(xe2x88x927.5Exe2x88x9218xc3x97NdGaAs+10.4)/6.6
wherein
Eg is a bandgap energy of the first layer at room temperature (eV),
xcex94y is a result of subtraction of a value of In composition of the first layer when the first layer coincides with the second layer in lattice constants from a value of the In composition of said first layer,
dInGaP is a thickness of the first layer (nm),
Ndemitter is a carrier concentration of the first layer (cmxe2x88x923),
dn+GaAs is a thickness of a charge compensation layer (nm) and
NdGaAs is a carrier concentration of the second layer (cmxe2x88x921).
The ninth mode of this invention is a thin film crystal wafer with pn-junction described in the above first, second, third, fourth, fifth, sixth, seventh or eighth mode, wherein epitaxial growth of each of said layers is performed in organometallic vapor-phase growth method.
This invention provides the above-described structure wherein on the heterojunction interface formed by the first layer of a first conductivity type which is a 3-5-group compound semiconductor represented by the general formula: InxGayAlzP (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6zxe2x89xa61, x+y+z=1) and the second layer, made above said first layer, of a first conductivity type which is a 3-5-group compound semiconductor represented by the general formula: InxGayAlzAs (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6zxe2x89xa61, x+y+z=1), there is provided a charge compensation layer of a first conductivity type with an impurity concentration higher than that of said first and second layers. Consequently, depletion of carrier at the above junctional interface can be compensated to increase the carrier concentrations, whereby the formation of a high resistance layer at the junction interface is prevented and increase in base current is suppressed. As a result, decrease in current gain is suppressed. Thus, the characteristics of HBT can be markedly improved. Since the charge compensation layer is composed to have an appropriate thickness, the compensation of carrier depletion can be maintained in a stable manner. Thus, the stabilization of characteristics can be expected.